Device design for low power electronics with accurate deep submicrometer LDD-MOSFET models

Accurate MOSFET I_dsat model including LDD parasitic resistance and channel subthreshold leakage models current MOSFET operation regions, particularly moderate inversion and subthreshold regions that are important for low power electronics, have been presented with measurement data. Based on these accurate models, CMOS gate performance and power consumption optimization guidelines have been discussed in terms of device T_ox, V_dd and V_t . It predicts that there exists certain T_ox value that can minimize the gate delay. Device designs for low power electronics considering trade-offs by varying V_dd, T_ox and V _t are highlighted