Ultra-low voltage digital circuit design: A comparative study

Ultra-low voltage digital circuit is an active research area that tailors portable applications. Such applications include wearable electronics, intelligent remote sensors, implantable medical devices, and energy-harvesting systems. Two major goals of such systems are minimized energy consumption and improved compatibility with low-voltage power supplies and analog components. The immediate solution to achieve these goals is to reduce the supply voltage, but doing so raises the issue of operability. At low supply voltages, the integrity of digital signals degrades dramatically due to the indifference between active and leakage currents. In addition, the system timing becomes more unpredictable as the impact of process/voltage/temperature variations being more significant at lower voltages. This paper presents a comparative study of two circuit- and architecture-level techniques that address digital signal integrity and system timing at ultra-low voltages, i.e., Schmitt-trigger gate structure and delay-insensitive asynchronous logic. Results from test circuits show that static designs have wider dynamic range, while Schmitt-trigger designs are capable of operating at lower voltages. In addition, for static designs the synchronous circuit performs better in energy. For Schmitt-trigger design the asynchronous circuit has advantage.