Design considerations for next generation wireless power-aware microsensor nodes

In order to break the 100 μW average power barrier of a wireless microsensor node, aggressive design methodologies need to be developed. Dynamic voltage scaling should be more aggressive, reaching subthreshold operation, and knobs should be available for adapting hardware bit-precision and latency. Since the nodes operate in a sleep state most of the time, standby leakage currents must be reduced and the power supply voltage regulated to a near-optimum value. This paper presents insight and simulation/experimental results addressing some of the challenges of designing next generation wireless microsensor nodes.