Title :
Towards VLSI GaAs heterostructure FET integrated circuits
Author_Institution :
Honeywell Inc., Bloomington, MN, USA
Abstract :
A self-aligned, refractory metal gate, heterostructure FET process for the fabrication of high-speed digital and mixed digital/analog LSI/VLSI integrated circuits is reported. A 4500-gate 16*16 complex multiplier, a 3800-gate butterfly adder and a four-bit analog-to-digital converter have been demonstrated using MBE (molecular beam epitaxy)-grown heterostructure FET technology. With nominal 1- mu m-gate-length devices, DCFL (direct-coupled FET logic) ring oscillators have propagation delays, of 28 ps/stage at a power dissipation of 1 mW/stage. When the gate length is reduced to 0.5 mu m, DCFL ring oscillators have propagation delays of 17 ps/stage with a power dissipation of 1 mW/stage.<>
Keywords :
III-V semiconductors; VLSI; adders; analogue-digital conversion; digital integrated circuits; field effect integrated circuits; gallium arsenide; integrated logic circuits; molecular beam epitaxial growth; multiplying circuits; semiconductor epitaxial layers; semiconductor growth; 0.5 micron; 1 mW; 1 micron; 16*16 complex multiplier; 17 ps; DCFL; LSI; MBE; VLSI; analog-to-digital converter; butterfly adder; gate length; heterostructure FET process; high-speed digital ICs; mixed digital/analogue ICs; power dissipation; propagation delays; refractory metal gate; ring oscillators; Analog integrated circuits; FET integrated circuits; Fabrication; Gallium arsenide; Large scale integration; Molecular beam epitaxial growth; Power dissipation; Propagation delay; Ring oscillators; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1989.74236