Title :
A CMOS beta multiplier voltage reference with improved temperature performance and silicon tunability
Author :
Prasad, S.S. ; Mandal, Pradip
Abstract :
A new implementation has been proposed for the beta multiplier voltage reference to improve its performance with regard to process variations. The scope for silicon tunability on the proposed circuit is also discussed. The circuit was implemented in a 0.18 μ process and was found to have a temperature sensitivity of less than 500 ppm/C in the virgin die without trimming.
Keywords :
CMOS integrated circuits; elemental semiconductors; silicon; CMOS beta multiplier voltage reference; micro process; silicon tunability; temperature performance; temperature sensitivity; trimming; Character generation; Intrusion detection; MOSFET circuits; Photonic band gap; Semiconductor device modeling; Silicon; Substrates; Temperature dependence; Temperature sensors; Threshold voltage;
Conference_Titel :
VLSI Design, 2004. Proceedings. 17th International Conference on
Print_ISBN :
0-7695-2072-3
DOI :
10.1109/ICVD.2004.1260977
