• DocumentCode
    2510384
  • Title

    Physics-based via model development and verification

  • Author

    Zhang, Jianmin ; Chen, Qinghua B. ; Yang, Zhiping ; Drewniak, James L. ; Orlandi, Antonio

  • Author_Institution
    CISCO Syst., Inc., San Jose, CA, USA
  • fYear
    2010
  • fDate
    12-16 April 2010
  • Firstpage
    1043
  • Lastpage
    1046
  • Abstract
    Vias are widely modeled and investigated as they are one of the most concerns for the critical signal nets in high-speed digital systems. 3-D full-wave modelling can predict the electrical performance of a via accurately with correct model settings, which are related to the understood of the physics behind the signal transition and the wave propagation associated with the via. This paper will detail physics-based via model development by tracking the current path and mapping the via structures to circuit components/blocks where the peeling and partitioning method is used to decompose the entire via structure into via blocks. A simple via structure with the signal transitions from a microstrip to a microstrip is studied as an example. Good agreement has been achieved between the physics-based via simulation and the full-wave modeling in the frequency-domain with S-parameters and in the time-domain with eye-height and eye-width at different data rates.
  • Keywords
    S-parameters; electromagnetic wave propagation; electronic engineering computing; formal verification; frequency-domain analysis; microstrip circuits; printed circuit design; time-domain analysis; 3D full-wave modelling; S-parameter; circuit block; circuit component; electrical performance; eye-height; eye-width; frequency-domain; high-speed digital system; microstrip; model development; model verification; partitioning method; peeling method; physics; printed circuit board; signal nets; signal transition; time-domain; via block; via structure; wave propagation; Digital systems; Electromagnetic modeling; Finite difference methods; Frequency; Impedance; Microstrip; Physics; Predictive models; RLC circuits; Time domain analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility (APEMC), 2010 Asia-Pacific Symposium on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-5621-5
  • Type

    conf

  • DOI
    10.1109/APEMC.2010.5475507
  • Filename
    5475507