Designing leakage aware multipliers

Power consumption has become a major design limiter. With the continued reduction of threshold voltages, optimizing leakage energy consumption is becoming increasingly important. Hence, the design of leakage-conscious memory and data path components is vital. This paper focuses on designing a 32-bit double precision multiplier, and shows how the appropriate choice of implementation primitives used in the design can provide significant leakage energy savings without much impact on performance.