• DocumentCode
    2511016
  • Title

    Energy model based macrocell placement for wirelength minimization

  • Author

    Alupoaei, Stelian ; Katkoori, Srinivas

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
  • fYear
    2004
  • fDate
    2004
  • Firstpage
    713
  • Lastpage
    716
  • Abstract
    We propose a new iterative approach that models the wirelength minimization problem as a minimum (potential) energy problem. The cell energy is the sum of the net energy (analogous to the spring elastic energy) and the overlap potential energy (analogous to the gravitational potential energy). Energy-based model is shown to be superior to the force-directed model.
  • Keywords
    VLSI; cellular arrays; circuit optimisation; integrated circuit layout; VLSI; cell energy; energy model; force directed model; gravitational potential energy; integrated circuit layout; macrocell placement; minimum energy problem; minimum potential problem; overlap potential energy; spring elastic energy; wirelength minimization; Macrocell networks; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2004. Proceedings. 17th International Conference on
  • Print_ISBN
    0-7695-2072-3
  • Type

    conf

  • DOI
    10.1109/ICVD.2004.1261010
  • Filename
    1261010