SET based low power consuming digital circuits

Author

Alam, Ahmed Shariful ; Rahman, Md Arifur ; Kamal, Abu Hena Md Mustafa ; Mahmud, Md Salek

Author_Institution

Dept. of EEE, Islamic Univ. of Technol., Gazipur, Bangladesh

fYear

2014

fDate

20-22 Dec. 2014

Firstpage

144

Lastpage

147

Abstract

Single Electron Transistor (SET) is an ultra small device which can be used as a possible replacement of a MOSFET. Like CMOS technology, CSET (Complementary SET) models can be used to build same digital circuits. Apart from the drawbacks (which have been discussed at the end of this paper), these digital circuits work fine. One of the main advantages of a SET based digital circuit over a MOSFET based digital circuit is its low power consumption. In this paper we have focused on this issue. For an example, we have presented the circuits of NAND gate and NOR gate made up of both MOSFETs and SETs. The PSPICE simulations of these circuits show that the SET built digital circuits consume much less power than those of MOSFETs.

Keywords

digital circuits; logic gates; low-power electronics; power consumption; single electron transistors; CSET models; NAND gate; NOR gate; PSPICE simulations; complementary SET; digital circuits; low power consumption; single electron transistor; Digital circuits; Integrated circuit modeling; Logic gates; MOSFET; Power demand; SPICE; Transient analysis; Moore´s law; NAND gate; NOR gate; background charge; low power consumption; orthodox theory;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering (ICECE), 2014 International Conference on

Conference_Location

Dhaka

Print_ISBN

978-1-4799-4167-4

Type

conf

DOI

10.1109/ICECE.2014.7026841

Filename

7026841