Title :
Random access scan: a solution to test power, test data volume and test time
Author :
Baik, Dong Hyun ; Saluja, Kewal K. ; Kajihara, Seiji
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Abstract :
Adherence to serial scan is preventing the researchers from investigating alternative design for test techniques that may offer larger test benefit at the cost of some what higher overhead. In this paper, we investigate the use of random access scan for simultaneous reduction of test power, test data volume and test application time. We provide an asymmetric traveling salesman formulation of these problems to minimize random access scans and the test data. Application of our method results into nearly 3× speedup in test application time, 60% reduction in test data volume and over 99% reduction in power consumption for benchmark circuits.
Keywords :
boundary scan testing; circuit optimisation; power consumption; travelling salesman problems; asymmetric traveling salesman formulation; benchmark circuits; minimization; power consumption; random access scan; serial scan; Testing; Very large scale integration;
Conference_Titel :
VLSI Design, 2004. Proceedings. 17th International Conference on
Print_ISBN :
0-7695-2072-3
DOI :
10.1109/ICVD.2004.1261042