• DocumentCode
    2512496
  • Title

    Development methodology: from system and design architecture to EMC improvement

  • Author

    Galtié, Franck ; Vrignon, Bertrand

  • Author_Institution
    RASG Group, Freescale Semicond., Toulouse, France
  • fYear
    2010
  • fDate
    12-16 April 2010
  • Firstpage
    1055
  • Lastpage
    1059
  • Abstract
    This paper deals with the methodology to take into account conducted and radiated emissions from the early development phase: system architecture definition. Following the system analysis, the first design architecture is proposed, highlighting the potential noise sources. Detailed evaluation of all those noise contributors (frequencies, current slopes, topology...) leads to a new architecture which is compliant with EMC standards. In this paper, we describe this methodology and illustrate it with the development of a power management integrated circuit, dedicated to automotive business. We review each block of this integrated circuit and explain the design strategy used to reduce the emissions.
  • Keywords
    design engineering; electromagnetic compatibility; EMC improvement; design architecture; development methodology; power management integrated circuit; system architecture; Circuit simulation; Circuit testing; Electromagnetic compatibility; Energy management; Frequency; Integrated circuit noise; Performance analysis; Performance evaluation; Risk management; Semiconductor device noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility (APEMC), 2010 Asia-Pacific Symposium on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-5621-5
  • Type

    conf

  • DOI
    10.1109/APEMC.2010.5475610
  • Filename
    5475610