DocumentCode
2516790
Title
New and accurate method for electrical extraction of silicon film thickness on fully-depleted SOI and double gate transistors
Author
Poiroux, T. ; Widiez, J. ; Lolivier, J. ; Vinet, M. ; Cassé, M. ; Prévitali, B. ; Deleonibus, S.
Author_Institution
DRT, CEA, Grenoble, France
fYear
2004
fDate
4-7 Oct. 2004
Firstpage
73
Lastpage
74
Abstract
In this study, we propose an accurate method for electrical extraction of thin silicon film thickness, based on an analytical modelling of the subthreshold inversion charge valid from front to back channel conduction and including quantum confinement effects. This method has been validated on both numerical simulation and experimental results and can be used for low-doped channel FDSOI or double gate devices.
Keywords
MOSFET; elemental semiconductors; semiconductor device models; semiconductor thin films; silicon; silicon-on-insulator; Si; double gate devices; double gate transistors; fully-depleted SOI; low-doped channel FDSOI devices; numerical simulation; quantum confinement effects; silicon film thickness; Dielectric thin films; Electrostatics; Equations; MOSFET circuits; Numerical simulation; Potential well; Semiconductor films; Silicon on insulator technology; Thin film devices; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2004. Proceedings. 2004 IEEE International
Print_ISBN
0-7803-8497-0
Type
conf
DOI
10.1109/SOI.2004.1391561
Filename
1391561
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