High performance digitally programmable CNN chip with discrete templates

Author

Sargeni, Fausto ; Bonaiuto, Vincenzo

Author_Institution

Dept. of Electron. Eng., Tor Vergata Univ., Rome, Italy

fYear

1994

fDate

18-21 Dec 1994

Firstpage

67

Lastpage

72

Abstract

In this paper a high performance VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Network with discrete templates is presented. This chip, manufactured and successfully tested, gives an efficient solution to the hardware implementation of the Cellular Neural Networks. Moreover this chip can be connected to others to carry out very large CNN arrays. This implementation covers the 66% of the available one-neighborhood fixed templates for image processing applications

Keywords

cellular neural nets; image processing; neural chips; CNN arrays; CNN chip; Cellular Neural Networks; Digitally Programmable Cellular Neural Network; discrete templates; hardware implementation; image processing; one-neighborhood fixed templates; Cellular neural networks; Electronic mail; Equations; Image processing; Manufacturing; Neural network hardware; Testing; Transconductance; Very large scale integration; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Cellular Neural Networks and their Applications, 1994. CNNA-94., Proceedings of the Third IEEE International Workshop on

Conference_Location

Rome

Print_ISBN

0-7803-2070-0

Type

conf

DOI

10.1109/CNNA.1994.381705

Filename

381705