Title :
Mobility enhancement of SSOI devices fabricated with sacrificial thin relaxed SiGe
Author :
Lee, J.J. ; Maa, J.S. ; Tweet, D.J. ; Hsu, S.T.
Author_Institution :
Sharp Lab. of America, Camas, WA, USA
Abstract :
NMOS and PMOS devices have been successfully fabricated on SSOI wafers with a 20 nm strained Si layer. The electron and hole mobility enhancements are 115% and 45%, respectively. The SSOI wafer was fabricated by direct wafer bonding with the strained Si on thin SiGe (300 nm) virtual substrate transferred to the oxidized handle wafer by splitting. Strained SiGe depositing H2+ implantation, and SiGe lattice relaxation annealing are sequentially performed for the thin SiGe virtual substrate fabrication.
Keywords :
Ge-Si alloys; MOSFET; annealing; electron mobility; elemental semiconductors; hole mobility; hydrogen; ion implantation; semiconductor thin films; silicon-on-insulator; wafer bonding; 20 nm; 300 nm; H2+ implantation; NMOS devices; PMOS devices; SOI wafers; SSOI devices; SiGe lattice relaxation annealing; SiGe-Si:H2; electron-hole mobility enhancement; oxidized handle wafer; sacrificial thin relaxed SiGe; silicon-on-insulator; strained Si layer; strained SiGe deposition; thin SiGe virtual substrate fabrication; wafer bonding; Annealing; Fabrication; Germanium silicon alloys; Hydrogen; Lattices; MOS devices; Rough surfaces; Silicon germanium; Substrates; Wafer bonding;
Conference_Titel :
SOI Conference, 2004. Proceedings. 2004 IEEE International
Print_ISBN :
0-7803-8497-0
DOI :
10.1109/SOI.2004.1391590
