Title :
Low Cost Lithography Solution for Advanced Packaging and Application to Through Silicon Via Process
Author :
Jacquet, F. ; Henry, D. ; Charbonnier, J. ; Bouzaida, N. ; Sillon, N. ; Tsai, C. ; Balut, C. ; Raine, J.S.
Author_Institution :
CEA-LETI, MINATEC, Grenoble, France
Abstract :
In this paper, the via-last TSV process using dry film lithography will be presented. Historically we used dry film resist (DFR) for the copper rerouting (via metallization) step only, but here we also tried implementing it for via etching. In the first part of the paper the via-last process flow will be briefly described. Then the copper rerouting lithography using dry film will be presented. This includes mask design, process parameters and morphological characterization. In the third part of the paper, we will show how dry film can also be used for silicon deep etching. For process evaluation, various lithography parameters were scanned. Selected dry film resist was tested on demonstrators for dry etching and morphological results will be presented.
Keywords :
elemental semiconductors; etching; lithography; masks; metallisation; resists; silicon; wafer level packaging; Si; advanced packaging technology; copper rerouting lithography; dry etching; dry film lithography; dry film resist; low cost lithography solution; mask design; metallization; morphological property; silicon deep etching; silicon via process; through silicon vias; via etching; via-last TSV process; wafer level packaging; Copper; Costs; Dry etching; Lithography; Metallization; Packaging; Process design; Resists; Silicon; Through-silicon vias; Advanced packaging; Dry Film Resist (DFR); Through Silicon Via (TSV); Via-last; Wafer level technologies;
Conference_Titel :
Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2117-6
Electronic_ISBN :
978-1-4244-2118-3
DOI :
10.1109/EPTC.2008.4763411
