DocumentCode :
2517536
Title :
Parallel Architecture for the Solution of Linear Equation Systems Implemented in FPGA
Author :
Alonso, R.M. ; Lucio, D.T.
Author_Institution :
Inst. Tecnol. de Morelia, Morelia, Mexico
fYear :
2009
fDate :
22-25 Sept. 2009
Firstpage :
275
Lastpage :
280
Abstract :
This paper presents a parallel architecture for the solution of linear equations based on the division free Gaussian elimination method is presented. This architecture can handle single and double data that follows the IEEE standard 754 for floating-point data. Also, it can be implemented in a FPGA Spartan 3 of Xilinx. The mathematical algorithm is implemented in an array of processors. The main procedure inside each processor and the data distribution between processors is described. Furthermore, the synthesis of the designed modules for each processor that composed the proposed architecture is presented. The obtained algorithmic complexity is O(n2) using a scheme of n2 processors that perform the solution of the linear equations set.
Keywords :
computational complexity; field programmable gate arrays; floating point arithmetic; mathematics computing; matrix algebra; parallel algorithms; FPGA Spartan 3; IEEE standard 754; Xilinx; algorithmic complexity; data distribution; division free Gaussian elimination method; floating-point data; linear equation system; mathematical algorithm; matrix algebra; parallel architecture; processor array; Arithmetic; Automotive engineering; Computer architecture; Concurrent computing; Equations; Field programmable gate arrays; Matrices; Parallel architectures; Parallel processing; Parallel robots; Division Free Gaussian Elimination; FPGA; linear systems; parallel architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Robotics and Automotive Mechanics Conference, 2009. CERMA '09.
Conference_Location :
Cuernavaca, Morelos
Print_ISBN :
978-0-7695-3799-3
Type :
conf
DOI :
10.1109/CERMA.2009.14
Filename :
5341975
Link To Document :
بازگشت