DocumentCode
2517597
Title
Analysis and design of digital CMOS circuits in hybrid SOI-epitaxial technology with different crystal orientations
Author
Das, Koushik K. ; Lo, Shih-Hsien ; Chuang, Ching-Te ; Bernstein, K. ; Williams, Richard Q.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2004
fDate
4-7 Oct. 2004
Firstpage
177
Lastpage
178
Abstract
This paper discusses the analysis and design of digital CMOS circuits in hybrid SOI-epitaxial technology with different crystal orientations. Various mobility enhancement schemes, such as strained Si channel devices, utilization of process/structure induced stresses, and use of different crystal orientation, have been proposed.
Keywords
CMOS digital integrated circuits; carrier mobility; crystal orientation; elemental semiconductors; integrated circuit design; silicon-on-insulator; Si; crystal orientation; digital CMOS circuit design; hybrid SOI epitaxial technology; mobility enhancement; strained Si channel devices; CMOS digital integrated circuits; CMOS technology; Capacitance; Delay effects; Microelectronics; Radio frequency; Semiconductor device modeling; Semiconductor epitaxial layers; Semiconductor process modeling; Stacking;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2004. Proceedings. 2004 IEEE International
Print_ISBN
0-7803-8497-0
Type
conf
DOI
10.1109/SOI.2004.1391605
Filename
1391605
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