DocumentCode
2517855
Title
Embedded Leadless Chip Carrier
Author
Lim, L.A. ; Ramkumar, M.
Author_Institution
ASM Technol. Singapore Pte. Ltd., Singapore, Singapore
fYear
2008
fDate
9-12 Dec. 2008
Firstpage
249
Lastpage
253
Abstract
Recently there have been several developments in the areas of small form factor and high-density lead frame based IC packages. These packages have the benefits of occupying smaller PC board area, lower assembly material consumption due to their smaller volume package construction, and good thermal dissipation properties. Details of benefits of the relevant assembly processes would be covered including actual comparison. Another area of recent development in packaging integration is system in package SIP. A SIP package can integrate various ICs in a package. For example; CPU, logic, analog, digital, discrete and passive components can be integrated in a single package. SIP provides a high level of integration capability of several functional chips. It provides good miniaturization capability for hand held portable electronic communication devices. High-density capability and flexibility in design using a substrate like chip carrier will be covered. However there are several challenges faced by the end user in assembly of these packages. This paper will cover the benefits of a newly developed leadless chip carrier and the challenges faced and addressed in the assembly downstream processes.
Keywords
assembling; system-in-package; SIP; assembly; embedded leadless chip carrier; system-in-package; Assembly; Building materials; Costs; Electronic packaging thermal management; Electronics packaging; Integrated circuit packaging; Logic devices; Microassembly; Transmission line matrix methods; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
Conference_Location
Singapore
Print_ISBN
978-1-4244-2117-6
Electronic_ISBN
978-1-4244-2118-3
Type
conf
DOI
10.1109/EPTC.2008.4763442
Filename
4763442
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