• DocumentCode
    2518165
  • Title

    Dataflow analysis of branch mispredictions and its application to early resolution of branch outcomes

  • Author

    Farcy, Alexandre ; Temam, Olivier ; Espasa, Roger ; Juan, Toni

  • Author_Institution
    PRiSM, Univ. de Versailles, France
  • fYear
    1998
  • fDate
    30 Nov-2 Dec 1998
  • Firstpage
    59
  • Lastpage
    68
  • Abstract
    The goal of this study is twofold: to analyze in detail the nature of conditional branch mispredictions in correlation based branch predictors, and, based on this analysis, to reduce the impact of branch mispredictions on processor performance by decreasing the branch resolution delay instead of improving the branch prediction accuracy. We classify conditional branches with the highest number of mispredictions according to the nature of their branch condition analytical expression. Based on these expressions, we can analyze and even precisely explain the origin of mispredictions in many cases. Moreover we find that many such branches belong to small sets of blocks inside loops, and within such sets we find that some of the branch expressions have regularity properties. We show how to exploit this regularity property by anticipating the branch outcome, where anticipation is a combination of value prediction and normal dataflow execution. We investigate a hardware mechanism to implement the concept of branch outcome anticipation. This mechanism relies on the separate execution of the normal program flow and a branch flow, which is a subset of the program flow corresponding to copies of the instructions needed to compute branch outcomes. The branch flow uses the regularity properties of branch condition expressions to get ahead of the normal program flow whenever possible. Currently, the mechanism can only target a subset of the conditional branches, but with these branches we experimentally show that the anticipation mechanism successfully reduces the average branch misprediction latency by 60%
  • Keywords
    computer architecture; data flow analysis; performance evaluation; branch misprediction latency; branch mispredictions; branch resolution delay; conditional branch mispredictions; conditional branches; dataflow analysis; hardware mechanism; regularity property; Computer aided instruction; Contracts; Data analysis; Data flow computing; Delay; Upper bound;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 1998. MICRO-31. Proceedings. 31st Annual ACM/IEEE International Symposium on
  • Conference_Location
    Dallas, TX
  • ISSN
    1072-4451
  • Print_ISBN
    0-8186-8609-X
  • Type

    conf

  • DOI
    10.1109/MICRO.1998.742769
  • Filename
    742769