Design of Fixed-Point Processing Based LDPC Codes Using EXIT Charts

The computational complexity and hence energy consumption of a low-density parity-check (LDPC) decoder employing fixed point (FP) computation is commensurate with the operand width (OW) of the FP representation employed. Therefore low OWs are desirable, but, if the OW is too low, then an inevitable performance degradation will be introduced. For that reason it is desirable to determine the minimum OW that does not impose a significant performance degradation. Previous efforts have advocated different OWs based on results obtained using time-consuming bit-error ratio (BER) simulations. However, these BER simulations are extremely time consuming, owing to the requirement of considering a range of channel signal-to-noise ratios (SNRs). Therefore, in this paper, we propose the employment of extrinsic information transfer (EXIT) charts to overcome this drawback. Furthermore, EXIT-chart analysis has the additional benefit of offering insights into the specific causes of the performance degradations encountered. Finally, a FP scheme having an overall OW of 6 bits is proposed for the implementation of the min-sum algorithm (MSA).