DocumentCode :
2519608
Title :
Multi-chip Integrate and Fire neural network architecture
Author :
Sargeni, Fausto ; Bonaiuto, Vincenzo
Author_Institution :
Dept. of Electron. Eng., Univ. of Rome Tor Vergata, Rome, Italy
fYear :
2010
fDate :
26-28 April 2010
Firstpage :
630
Lastpage :
634
Abstract :
In the field of the Artificial Neural Networks, multi-chip architecture can be effectively used to implement very large networks. The availability of large neural electronic systems can represent a really useful tool to deeply and effectively investigate on innovative, “bio-inspired”, computational paradigms. In this paper, the authors present a technique to reduce the I/O analogue pins of about 87%, previously applied from the authors to Cellular Neural Networks, well suited for neuromorphic neural networks.
Keywords :
neural nets; I/O analogue pins; artificial neural network; integrate-and-fire neural network; multichip architecture; neuromorphic neural network; Artificial neural networks; Biological neural networks; Cellular neural networks; Fires; Integrated circuit interconnections; Neural networks; Neuromorphics; Neurons; Pulse circuits; Time division multiple access;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
MELECON 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference
Conference_Location :
Valletta
Print_ISBN :
978-1-4244-5793-9
Type :
conf
DOI :
10.1109/MELCON.2010.5476009
Filename :
5476009
Link To Document :
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