DocumentCode :
252073
Title :
Don´t cares based dynamic test vector compaction in SAT-ATPG
Author :
Habib, Kareem ; Safar, Mona ; Dessouky, Mohamed ; Salem, Ashraf
Author_Institution :
Mentor Graphics Corp., Cairo, Egypt
fYear :
2014
fDate :
3-6 Aug. 2014
Firstpage :
213
Lastpage :
217
Abstract :
SAT solvers have been used as ATPG solution due to the advantage of transforming the circuit to a mathematical problem that can quickly be solved rather than using traditional circuit based approach. In this paper, we present a novel technique for dynamically compacting the test vector set in SAT-based ATPG as it searches for individual vectors, hence giving out fewer patterns that cover more faults. Three-valued encoding was used to allow the use of don´t cares, a value that is not part of the traditional SAT solver approach. Experimental results compare the traditional approach with the one proposed.
Keywords :
automatic test pattern generation; computability; encoding; network analysis; SAT solver approach; SAT-ATPG; circuit based approach; don´t cares based dynamic test vector compaction; mathematical problem; three-valued encoding; Automatic test pattern generation; Circuit faults; Compaction; Encoding; Heuristic algorithms; Logic gates; Vectors; ATPG; CNF; Dynamic Compaction; SAT;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on
Conference_Location :
College Station, TX
ISSN :
1548-3746
Print_ISBN :
978-1-4799-4134-6
Type :
conf
DOI :
10.1109/MWSCAS.2014.6908390
Filename :
6908390
Link To Document :
بازگشت