• DocumentCode
    2520744
  • Title

    Examples of image processing to benefit from an asynchronous implementation

  • Author

    Senn, Eric ; Zavidovique, Bertrand

  • Author_Institution
    LESTER, Univ. de Bretagne Sud, Lorient, France
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    270
  • Lastpage
    279
  • Abstract
    This paper describes how asynchronous techniques make easier timing in an image processing computer. It outlines an original machine architecture, and explains why it is asynchronous: the router circuit supports the asynchronism by itself. Its structure and behavior are sketched. Our method for self-timed design, its salient features and contributions to the typical asynchronous circuit design flow are introduced. The VLSI implementation and the cell set design, including full-custom self-timed asynchronous cells, are detailed. Measured circuit´s performances are presented, as well as global processing and communication performances for different image processing algorithms. The gain from asynchronism is exhibited
  • Keywords
    circuit layout CAD; electronic engineering computing; image processing; VLSI implementation; asynchronous implementation; communication performances; image processing; machine architecture; router circuit; salient features; self-timed design; Circuits; Clocks; Communication system control; Frequency synchronization; Humans; Image processing; Logic; Parallel machines; Robots; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on
  • Conference_Location
    Padova
  • Print_ISBN
    0-7695-0740-9
  • Type

    conf

  • DOI
    10.1109/CAMP.2000.875986
  • Filename
    875986