DocumentCode
2521237
Title
Resizing rules for the reuse of MOS analog designs
Author
Galup-Montoro, C. ; Schneider, M.C.
Author_Institution
Fed.. Univ. of Santa Catarina, Brazil
fYear
2000
fDate
2000
Firstpage
89
Lastpage
93
Abstract
This paper presents a redesign procedure for analog circuits based on a scalable model of the MOSFET. A set of very simple expressions allows the calculation of transistor dimensions and bias for a given circuit in a new generation technology, starting from the circuit designed in an earlier technology
Keywords
MOS analogue integrated circuits; MOSFET; integrated circuit design; semiconductor device models; MOS analog designs; MOSFET; operational amplifier; redesign procedure; resizing rules; scalable model; transistor dimensions; Analog circuits; CMOS technology; Digital circuits; Electronic mail; Equations; Intellectual property; MOSFET circuits; System-on-a-chip; Time to market; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design, 2000. Proceedings. 13th Symposium on
Conference_Location
Manaus
Print_ISBN
0-7695-0843-X
Type
conf
DOI
10.1109/SBCCI.2000.876013
Filename
876013
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