DocumentCode
2521310
Title
Novel Method for Modeling IBIS4.2 Four-Level Hysteresis Behavior in an Analog Simulator
Author
Sabry, Yasser M. ; Hareedy, Ahmed H. ; Selim, Mohamed A.
Author_Institution
Device Modeling Mixed-Signal Verification, Mentor Graphics, Cairo, Egypt
fYear
2008
fDate
9-12 Dec. 2008
Firstpage
1403
Lastpage
1408
Abstract
IBIS4.2 (I/O Buffer Information Specification) standard describes the hysteresis behavior from one simulation point to the other. In an analog simulator, solution is obtained based on multiple iterations in between simulation points. These iterations can lead to undesired behavior. The common problem that might be encountered with this specific behavior in an analog simulator due to iterations will be discussed, and a novel way for implementation that overcomes this problem will be proposed.
Keywords
analogue circuits; buffer circuits; circuit simulation; hysteresis; input-output programs; iterative methods; I-O buffer information specification; IBIS4.2 standard; analog simulator; four-level hysteresis behavior; multiple iterations; ANSI standards; Analytical models; Capacitance; Clamps; Communication standards; Electronic design automation and methodology; Graphics; Hysteresis; Logic devices; Standards development;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
Conference_Location
Singapore
Print_ISBN
978-1-4244-2117-6
Electronic_ISBN
978-1-4244-2118-3
Type
conf
DOI
10.1109/EPTC.2008.4763627
Filename
4763627
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