Title :
A 14-bit 5MHz continuous-time sigma-delta ADC
Author :
Gao Jing ; Mingqiang, Tu ; Tao, Luo
Author_Institution :
Sch. of Electron. & Inf. Eng., Tianjin Univ., Tianjin, China
Abstract :
A high-speed, high-accuracy, low power continuous-time sigma-delta (CTSD) modulator designed by using SMIC 0.18 μm CMOS technology is presented in the paper. The fifth-order CTSD modulator comprises a fifth-order RC operational-amplifier-based loop filter and 4-bit internal quantization operating at 320 MHz. The techniques of NRZ DAC pulse shaping and half sampling period delay are adopted to reduce clock jitter and delay time sensitivity. The modulator achieves 13.5-bit ENOB at 5 MHz signal bandwidth and OSR is 32. The power consumption of the modulator is 19.8 mW.
Keywords :
CMOS integrated circuits; filters; low-power electronics; operational amplifiers; sigma-delta modulation; NRZ DAC pulse shaping; SMIC CMOS technology; bandwidth 5 MHz; clock jitter reduction; continuous-time sigma-delta ADC; delay time sensitivity reduction; fifth-order CTSD modulator; fifth-order RC operational-amplifier-based loop filter; frequency 320 MHz; half sampling period delay; low power continuous-time sigma-delta modulator; power 19.8 mW; size 0.18 mum; word length 13.5 bit; word length 14 bit; word length 4 bit; Adders; CMOS integrated circuits; CMOS technology; Signal to noise ratio; Video recording;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2010 IEEE International Conference of
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-9997-7
DOI :
10.1109/EDSSC.2010.5713767
