A noise-coupled low-distortion delta-sigma ADC with shifted loop delays

A low-power low-distortion ΔΣ ADC topology with shifted loop delays is proposed. Compared to the conventional low-distortion modulator, this topology can relax the critical timing for quantization and DEM by shifting the loop delay from the last integrator to the feedback path. Also, by adding one more feedback path, the last integrator can achieve both integration and active summation. Noise-coupled technique can also be utilized in the proposed modulator. To verify the effectiveness of this topology, a third-order noise-coupled ΔΣ modulator is analyzed and simulated.