PWM with differential Class-E amplifier for efficiency enhancement at back-off power levels

Author

Khan, H.R. ; Qureshi, A.R. ; Zafar, Faiza ; ul Wahab, Qamar

Author_Institution

Dept. of Electron. Eng., NED Univ. of Eng. & Technol., Karachi, Pakistan

fYear

2014

fDate

3-6 Aug. 2014

Firstpage

607

Lastpage

610

Abstract

A simplified output matching network for pulse width modulated Class-E Power Amplifier for efficiency enhancement at back-off power level is proposed. The shunt capacitance and the series inductance in the Class-E PA are realized through capacitor banks that are tuned according to the duty cycle to meet ZVS conditions. The differential PA design is implemented in 130 nm CMOS technology achieving maximum Pout of 24.8 dBm at 1.8 GHz with PAE better than 38% at 50% duty cycle. The output power is modulated with the input duty cycle and provides 6.2 dB back-off power level keeping PAE almost constant around 38%.

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; differential amplifiers; integrated circuit design; zero voltage switching; CMOS technology; PWM; ZVS conditions; back-off power levels; capacitor banks; differential PA design; differential class-E amplifier; efficiency enhancement; frequency 1.8 GHz; input duty cycle; pulse width modulated class-E power amplifier; series inductance; shunt capacitance; simplified output matching network; size 130 nm; CMOS integrated circuits; Capacitors; Impedance matching; Inductors; Power amplifiers; Power generation; Pulse width modulation; Class-E; LC lattice balun; PWM; Power Back Off(PBO); capacitor bank;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on

Conference_Location

College Station, TX

ISSN

1548-3746

Print_ISBN

978-1-4799-4134-6

Type

conf

DOI

10.1109/MWSCAS.2014.6908488

Filename

6908488