DocumentCode :
2523259
Title :
Artificial deadlock detection in process networks for ECLIPSE
Author :
Bharath, N. ; Nandy, S.K. ; Bussa, Nagaraju
Author_Institution :
Supercomput. Educ. & Res. Centre, Indian Inst. of Sci., Bangalore, India
fYear :
2005
fDate :
23-25 July 2005
Firstpage :
22
Lastpage :
27
Abstract :
Kahn process network (KPN) is a popular model of computation for describing streaming applications. In a KPN model, processes communicate through unbounded unidirectional FIFOs. When theoretically unbounded FIFOs are implemented using finite memory, artificial deadlocks can occur due to one or more FIFOs having insufficient sizes. Generally, a system designer must be able to make a design time trade-off between execution time and memory usage, preferably using no more memory than required for obtaining a certain execution time. But it is practically impossible to decide at design time, FIFO sizes that are sufficient to run the application without any artificial deadlocks. Hence, there is a need for runtime mechanism for handling the artificial deadlock situations in process networks. Existing mechanisms detect artificial deadlocks only after all KPN processes block. This results in excessive blocking of processes and an application that appears to hang. In this paper, we present an improved mechanism for early detection of artificial deadlocks and its implementation on ECLIPSE (extended CPU local irregular processing architecture), an application domain specific architecture.
Keywords :
media streaming; multiprocessing systems; signal processing; system recovery; ECLIPSE; FIFO; Kahn process network; application domain specific architecture; artificial deadlock detection; extended CPU local irregular processing architecture; finite memory; runtime mechanism; Computational modeling; Computer networks; Intelligent networks; Laboratories; Runtime; Signal processing; Streaming media; Supercomputers; System recovery; Technological innovation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on
ISSN :
2160-0511
Print_ISBN :
0-7695-2407-9
Type :
conf
DOI :
10.1109/ASAP.2005.18
Filename :
1540361
Link To Document :
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