Exploiting Instruction-level Parallelism With The Conjugate Register File Scheme

Author

Chang, Meng-chou ; Lai, Feipei ; Shang, Rung-Ji

Author_Institution

National Taiwan University

fYear

1992

fDate

1-4 Dec 1992

Firstpage

Lastpage

Keywords

Boosting; Computer science; Constraint optimization; Hardware; Parallel processing; Processor scheduling; Registers; Strontium; Throughput; Zinc;

fLanguage

English

Publisher

ieee

Conference_Titel

Microarchitecture, 1992. MICRO 25., Proceedings of the 25th Annual International Symposium on

Print_ISBN

0-8186-3175-9

Type

DOI

10.1109/MICRO.1992.696995

Filename

696995

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