DocumentCode :
2524106
Title :
A highly integrated quasi-millimeter wave receiver chip using 3D-MMIC technology
Author :
Kaho, Takana ; Yamaguchi, Yo ; Uehara, Kazuhiro ; Nagamine, Shinji ; Toriyama, Yasuhiro ; Taniguchi, Toru
Author_Institution :
NTT Corp., Yokosuka
fYear :
2007
fDate :
8-10 Oct. 2007
Firstpage :
12
Lastpage :
15
Abstract :
A highly integrated quasi-millimeter wave receiver chip that integrates 22 circuits on a 3 x 2.3 mm chip using three-dimensional MMIC (3D-MMIC) technology is presented. The receiver MMIC operates with an LO signal in the 2.7-3.1 GHz range. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.4 GHz. It can use low-cost VCOs and demodulators in a 2-3 GHz frequency band. The power dissipation of the MMIC is only 450 mW. It also achieved low noise (3.4 dB) and high gain (41 dB) at 26 GHz. Furthermore, it achieved a high dynamic range using two step attenuators in the RF and IF frequency bands with a new built-in inverter using an N-channel depression FET.
Keywords :
MMIC; demodulators; microwave receivers; voltage-controlled oscillators; 3D-MMIC technology; LO signal; N-channel depression FET; VCO; demodulators; frequency 2.4 GHz; frequency 2.7 GHz to 3.1 GHz; frequency 26 GHz; integrated quasi-millimeter wave receiver chip; inverter; two step attenuators; Attenuators; Demodulation; Dynamic range; FETs; Gain; Integrated circuit technology; Inverters; MMICs; Power dissipation; Radio frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Integrated Circuit Conference, 2007. EuMIC 2007. European
Conference_Location :
Munich
Print_ISBN :
978-2-87487-002-6
Type :
conf
DOI :
10.1109/EMICC.2007.4412635
Filename :
4412635
Link To Document :
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