DocumentCode :
2524136
Title :
High radix addition via conditional charge transport in single electron tunneling technology
Author :
Meenderinck, Cor ; Cotofana, Sorin ; Lageweg, Casper
Author_Institution :
Comput. Eng. Lab., Delft Univ. of Technol., Netherlands
fYear :
2005
fDate :
23-25 July 2005
Firstpage :
294
Lastpage :
299
Abstract :
This paper investigates the implementation of high radix addition based on the electron counting logic design style in single electron tunneling (SET) technology. A previous proposal for such an adder assumed the presence of a conditional charge movement (MCke) block which was only described as a black box. First, this paper proposes two possible MCke block implementations, each of which is described in detail and validated by means of simulation. Second, one of the proposed MCke implementations is utilized in the design of a 6-bit radix-8 adder. The resulting adder circuit is verified by simulation and evaluation indicated that it requires 187 circuit elements, has a delay of 4.15 ns (assuming an error probability Perror and a consumed energy of 224 meV).
Keywords :
adders; circuit simulation; digital arithmetic; logic design; tunnelling; 4.15 ns; 6-bit radix-8 adder; adder circuit; conditional charge movement; conditional charge transport; electron counting logic design; high radix addition; single electron tunneling; Adders; Arithmetic; Circuit simulation; Delay; Electrons; Insulation; Logic design; Proposals; Reservoirs; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on
ISSN :
2160-0511
Print_ISBN :
0-7695-2407-9
Type :
conf
DOI :
10.1109/ASAP.2005.39
Filename :
1540400
Link To Document :
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