DocumentCode :
2524442
Title :
A 60-GHz 90-nm CMOS cascode amplifier with interstage matching
Author :
Heydari, B. ; Reynaert, P. ; Adabi, E. ; Bohsali, M. ; Afshar, B. ; Arbabian, M.A. ; Niknejad, A.M.
Author_Institution :
Univ. of California, Berkeley
fYear :
2007
fDate :
8-10 Oct. 2007
Firstpage :
88
Lastpage :
91
Abstract :
The design of a 60 GHz cascode amplifier in a 90 nm technology is described. The amplifier uses an interstage matching to increase the gain and to provide a better power match between the common-source and the common-gate transistor of the cascode device. Both the common-source and the common-gate transistor make use of an optimized round-table layout, which minimizes all terminal resistances and thus improves the mm-wave performance of the nMOS transistors. A record fmax of 300 GHz is achieved for a 40 mum round-table nMOS in 90 nm CMOS. The cascode amplifier achieves a gain of 7.5 dB at 60 GHz with a DC power consumption of only 6.7 mW. When compared to a shared-junction cascode amplifier or a two-stage common-source cascade amplifier, the presented cascode amplifier is favorable in terms of power gain and DC power consumption
Keywords :
CMOS integrated circuits; millimetre wave amplifiers; millimetre wave transistors; CMOS cascode amplifier; DC power consumption; common-gate transistor; common-source transistor; frequency 300 GHz; frequency 60 GHz; interstage matching; mm-wave performance; nMOS transistors; optimized round-table layout; power 6.7 mW; shared-junction cascode amplifier; size 90 nm; two-stage common-source cascade amplifier; CMOS technology; Design optimization; Energy consumption; Fingers; Frequency; MOS devices; MOSFETs; Microwave amplifiers; Moore´s Law; Power amplifiers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Integrated Circuit Conference, 2007. EuMIC 2007. European
Conference_Location :
Munich
Print_ISBN :
978-2-87487-002-6
Type :
conf
DOI :
10.1109/EMICC.2007.4412654
Filename :
4412654
Link To Document :
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