Title :
Scaling of BiCMOS digital circuit structures
Author :
Bellaouar, A. ; Embabi, S.K.H. ; Elmasry, M.I.
Author_Institution :
Dept. of Electr. Eng., Waterloo Univ., Ont., Canada
Abstract :
A generalized first-order scaling guide for digital BiCMOS circuit structures is presented. The effect of layout, profile, and power supply scaling on the circuit performance is reported. A case study that illustrates the speed improvement of BiCMOS circuit structures when the power supply is scaled from 5 V to 3.3 V is shown.<>
Keywords :
BIMOS integrated circuits; circuit reliability; digital integrated circuits; integrated circuit technology; 3.3 to 5 V; BiCMOS digital circuit structures; buffer scaling; circuit performance; first-order scaling guide; layout; power supply scaling; profile; speed improvement; BiCMOS integrated circuits; CMOS digital integrated circuits; Capacitance; Circuit optimization; Digital circuits; Doping; MOSFETs; Power supplies; Threshold voltage; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1989.74316
