• DocumentCode
    2524601
  • Title

    Linear Semiconductor Manufacturing Logistics and the Impact on Cycle Time

  • Author

    van der Meulen, P.

  • Author_Institution
    BlueShift Technol., Inc., Andover
  • fYear
    2007
  • fDate
    11-12 June 2007
  • Firstpage
    111
  • Lastpage
    116
  • Abstract
    Fabs need enhanced flexibility to manufacture smaller lots of wafers to reduce cycle time, inventory and WIP, while maintaining equipment throughput, avoiding cross-contamination and ensuring process integrity and yields. Current equipment has increasing difficulty meeting those demands. This paper describes various factors that could lead to optimized choices for the quantity of wafers in a lot of size smaller than 25 wafers, and shows the potential for decreases in cycle time associated with various equipment configurations and wafer lot sizes.
  • Keywords
    logistics; semiconductor device manufacture; WIP; cross contamination; cycle time; linear semiconductor manufacturing logistics; single wafer lot tracking; wafer lot size; Atherosclerosis; Dry etching; Furnaces; Inspection; Logistics; Manufacturing processes; Robots; Semiconductor device manufacture; Throughput; Wet etching; 300mm Prime; Cycle Time; Small Lot;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Semiconductor Manufacturing Conference, 2007. ASMC 2007. IEEE/SEMI
  • Conference_Location
    Stresa
  • Print_ISBN
    1-4244-0652-8
  • Type

    conf

  • DOI
    10.1109/ASMC.2007.4595693
  • Filename
    4595693