DocumentCode
2524822
Title
Quad DCVS dynamic logic fault modeling and testing
Author
Adams, R. Dean ; Cooley, Edmond S. ; Hansen, Patrick R.
Author_Institution
Thayer Sch. of Eng., Dartmouth Coll., Hanover, NH, USA
fYear
1998
fDate
18-23 Oct 1998
Firstpage
356
Lastpage
362
Abstract
Dynamic logic fails differently than static logic. Fault modeling with Quad Differential Cascode Voltage Switch (DCVS) is studied in simulation and hardware. Appropriate test methods are examined yielding results relevant to general dynamic logic, DCVS, and pass gate DCVS
Keywords
automatic testing; design for testability; digital simulation; fault simulation; logic design; logic testing; dynamic logic; dynamic logic fault modeling; fault modeling; pass gate DCVS; quad DCVS; quad differential cascode voltage switch; Adders; Circuit faults; Circuit testing; Educational institutions; Logic circuits; Logic design; Logic devices; Logic gates; Logic testing; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1998. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-5093-6
Type
conf
DOI
10.1109/TEST.1998.743174
Filename
743174
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