DocumentCode
252486
Title
SOI FinFET versus bulk FinFET for 10nm and below
Author
Hook, T.B. ; Allibert, F. ; Balakrishnan, K. ; Doris, B. ; Guo, D. ; Mavilla, N. ; Nowak, E. ; Tsutsui, G. ; Southwick, R. ; Strane, J. ; Xin Sun
Author_Institution
IBM SRDC, Essex Junction, VT, USA
fYear
2014
fDate
6-9 Oct. 2014
Firstpage
1
Lastpage
3
Abstract
FinFETs may in principle be built on either bulk [1-3] or SOI [4-5] substrates. In this paper we will review some of the technical issues associated with choice of substrate, directly comparing empirical results on 10nm hardware for which all the other processes are as much the same as possible. Furthermore, we will discuss the challenges beyond the 10nm generation, where fundamental changes in materials may render the debate moot. Our conclusion and prognosis is that SOI was, is, and will continue to be the technically superior choice.
Keywords
MOSFET; silicon-on-insulator; substrates; SOI FinFET; bulk FinFET; size 10 nm; substrate; Logic gates; RNA; Silicon germanium; Yttrium;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
Conference_Location
Millbrae, CA
Type
conf
DOI
10.1109/S3S.2014.7028186
Filename
7028186
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