DocumentCode
252488
Title
Dielectric isolated FinFETs on bulk substrate
Author
Lu, D. ; Kangguo Cheng ; Morin, P. ; Loubet, N. ; Hook, T. ; Dechao Guo ; Khakifirooz, A. ; Oldiges, P. ; Doris, B. ; Ken Rim ; Jacob, A. ; Huiming Bu ; Khare, M.
Author_Institution
IBM Res., Albany, NY, USA
fYear
2014
fDate
6-9 Oct. 2014
Firstpage
1
Lastpage
2
Abstract
Dielectric Isolated (DI) FinFETs exhibit superior electrostatic control compared to bulk FinFET without needing heavy sub-fin punchthrough stop doping, which increases device variability. Bottom oxidation through STI (BOTS) [1] and silicon-on-nothing (SON) are viable techniques to fabricate DI FinFETs on inexpensive bulk substates, as alternative to SOI substrate. In this paper we analyze DI FinFETs in terms of mechanical stress, transport, electrostatics and parasitic capacitances.
Keywords
MOSFET; capacitance; electrostatics; oxidation; silicon-on-insulator; thermal stresses; SOI substrate; bottom oxidation through STI; bulk substrate; dielectric isolated FinFETs; electrostatics; mechanical stress; parasitic capacitances; silicon-on-nothing FinFET process; transport properties; Dielectrics; FinFETs; Logic gates; Oxidation; Silicon; Stress; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
Conference_Location
Millbrae, CA
Type
conf
DOI
10.1109/S3S.2014.7028188
Filename
7028188
Link To Document