Title :
A four quadrant CMOS analog multiplier based on the non ideal MOSFET I–V characteristics
Author :
Dei, Michele ; Nizza, Nicolo ; Bruschi, Paolo ; Piotto, Massimo
Author_Institution :
Dipt. di Ing. dell´´Inf., Univ. di Pisa, Pisa
fDate :
June 22 2008-April 25 2008
Abstract :
This paper concerns an analog CMOS multiplier based on a novel approach to compensate for non idealities of the MOSFET square law approximation. A numerical algorithm has been implemented to find the optimum sizing of the active devices, starting from the process characteristics. The effectiveness of the proposed configuration has been demonstrated by means of electrical simulations performed on a prototype cell, designed using 0.32 mum - 3.3 V CMOS devices from the STMicroelectronic process BCD6s.
Keywords :
CMOS analogue integrated circuits; MOSFET; analogue multipliers; CMOS analog multiplier; I-V characteristics; MOSFET; STMicroelectronic process BCD6s; size 0.32 mum; square law approximation; voltage 3.3 V; CMOS process; Linearity; MOSFET circuits; Signal processing algorithms; Tail; Topology; Transconductance; Transconductors; Virtual prototyping; Voltage control;
Conference_Titel :
Research in Microelectronics and Electronics, 2008. PRIME 2008. Ph.D.
Conference_Location :
Istanbul
Print_ISBN :
978-1-4244-1983-8
Electronic_ISBN :
978-1-4244-1984-5
DOI :
10.1109/RME.2008.4595718
