Modelling and simulation of high speed, high voltage bipolar SOI transistor with fully depleted collector

Author

Arnborg, T.

Author_Institution

Microelectron. Res. Center, Ericsson Components AB, Kista, Sweden

fYear

1994

fDate

11-14 Dec. 1994

Firstpage

743

Lastpage

746

Abstract

A new type of bipolar transistor for SOI was recently proposed. The emitter-base structure is vertical but the high collector voltage is supported by a lateral fully depleted collector region. The transistor can be designed to handle almost any desired voltage up to several hundred volts. In this paper the transient characteristics and the prospects for high speed operation have been studied. It will be shown that the lateral transport of carriers along the silicon-oxide interface below the base-emitter is mainly diffusion. The associated transit time is limiting the speed substantially. However by inserting a highly doped floating region selectively below the base-emitter the high speed limited by the base-emitter structure is achievable without affecting the high voltage capability.<>

Keywords

power bipolar transistors; semiconductor device models; silicon-on-insulator; bipolar SOI transistor; high speed operation; highly doped floating region; lateral fully depleted collector region; lateral transport; transient characteristics; transit time; vertical emitter-base structure; Analytical models; Bipolar transistors; CMOS process; CMOS technology; Doping; Isolation technology; Low voltage; Microelectronics; Silicon; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-2111-1

Type

conf

DOI

10.1109/IEDM.1994.383282

Filename

383282