DocumentCode :
2524989
Title :
Built-in self-test of FPGA interconnect
Author :
Stroud, Charles ; Wijesuriya, Sajitha ; Hamilton, Carter ; Abramovici, Miron
Author_Institution :
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
fYear :
1998
fDate :
18-23 Oct 1998
Firstpage :
404
Lastpage :
411
Abstract :
We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affecting the programmable switches that configure the FPGA interconnect. As a result, the BIST technique provides complete testing of interconnect faults
Keywords :
built-in self test; fault simulation; field programmable gate arrays; integrated circuit interconnections; integrated circuit testing; logic testing; FPGA interconnect; SRAM based FPGA; built-in self-test; fault models; faults detection; interconnect faults; opens detection; programmable routing network; programmable switches; shorts detection; wiring segments; Built-in self-test; Circuit faults; Circuit testing; Field programmable gate arrays; Integrated circuit interconnections; Logic testing; Reconfigurable logic; Routing; System testing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-5093-6
Type :
conf
DOI :
10.1109/TEST.1998.743180
Filename :
743180
Link To Document :
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