DocumentCode :
2525016
Title :
Efficient absolute difference circuits in Virtex-5 FPGAs
Author :
Perri, Stefania ; Zicari, Paolo ; Corsonello, Pasquale
Author_Institution :
Dept. of Electornics, Comput. Sci. & Syst., Univ. of Calabria, Calabria, Italy
fYear :
2010
fDate :
26-28 April 2010
Firstpage :
309
Lastpage :
313
Abstract :
This paper presents a novel architecture optimized for realizing efficient absolute difference circuits in Virtex-5 FPGA devices. The proposed structure efficiently uses the 6-input look-up-tables available within the chosen devices family to maximize speed performance and to minimize the amount of occupied resources. In comparison with the DSP- and the LUT-based absolute difference circuits automatically synthesized and mapped by the ISE development tool the proposed structure is up to 40% cheaper and up to 61.5% faster.
Keywords :
field programmable gate arrays; signal processing; table lookup; DSP; ISE development tool; Virtex-5 FPGA; absolute difference circuits; look up tables; CMOS logic circuits; CMOS technology; Circuit synthesis; Computer architecture; Costs; Field programmable gate arrays; Logic design; Logic devices; Reconfigurable logic; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
MELECON 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference
Conference_Location :
Valletta
Print_ISBN :
978-1-4244-5793-9
Type :
conf
DOI :
10.1109/MELCON.2010.5476276
Filename :
5476276
Link To Document :
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