Monolithic 3D integration: A powerful alternative to classical 2D scaling

Author

Vinet, M. ; Batude, P. ; Fenouillet-Beranger, C. ; Clermidy, F. ; Brunet, L. ; Rozeau, O. ; Hartmannn, J. ; Billoint, O. ; Cibrario, G. ; Previtali, B. ; Tabone, C. ; Sklenard, B. ; Turkyilmaz, O. ; Ponthenier, F. ; Rambal, N. ; Samson, M. ; Deprat, F. ;

Author_Institution

LETI, Minatec, Grenoble, France

fYear

2014

fDate

6-9 Oct. 2014

Firstpage

1

Lastpage

3

Abstract

Monolithic or sequential 3D Integration is a powerful technological enabler for actual 3D IC design as the stacked layers can be connected at the transistor scale. This paper reviews the opportunities brought by M3DI and highlights the applications benefiting from this small 3D contact pitch. It also presents the technological challenges of this concept and offers a general overview of the potential solutions to obtain a high performance low temperature top transistor while keeping bottom MOSFET integrity.

Keywords

MOSFET; integrated circuit design; three-dimensional integrated circuits; 3D IC design; 3D contact pitch; M3DI; bottom MOSFET integrity; high performance low temperature top transistor; monolithic 3D integration; sequential 3D integration; stacked layers; technological enabler; CMOS integrated circuits; Field programmable gate arrays; MOSFET; Optimization; Thermal stability; Three-dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE

Conference_Location

Millbrae, CA

Type

conf

DOI

10.1109/S3S.2014.7028194

Filename

7028194