• DocumentCode
    252505
  • Title

    Design challenges and solutions for ultra-high-density monolithic 3D ICs

  • Author

    Panth, S. ; Samal, S. ; Yun Seop Yu ; Sung Kyu Lim

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2014
  • fDate
    6-9 Oct. 2014
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Monolithic 3D ICs (M3D) are an emerging technology that offers an ultra-high-density 3D integration due to the extremely small size of monolithic inter-tier vias. We explore various design styles available in M3D and present design techniques to obtain GDSII-level signoff quality results for each of these styles. We also discuss various challenges facing each style and provide solutions to them.
  • Keywords
    SRAM chips; integrated circuit design; three-dimensional integrated circuits; transistor circuits; GDSII-level signoff quality; block-level monolithic 3D ICs; gate-level monolithic 3D ICs; monolithic 3D SRAM; monolithic intertier vias; transistor-level monolithic 3D ICs; ultrahigh-density monolithic 3D ICs; Integrated circuit modeling; Logic gates; MOS devices; Metals; Random access memory; Standards; Three-dimensional displays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
  • Conference_Location
    Millbrae, CA
  • Type

    conf

  • DOI
    10.1109/S3S.2014.7028195
  • Filename
    7028195
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=252505