Title :
A novel test methodology for core-based system LSIs and a testing time minimization problem
Author :
Sugihara, Makoto ; Date, Hiroshi ; Yasuura, Hiroto
Author_Institution :
Dept. of Comput. Sci. & Commun. Eng., Kyushu Univ., Fukuoka, Japan
Abstract :
In this paper, we propose a novel test methodology for core-based system LSIs. Our test methodology aims to decrease testing time for core-based system LSIs. Considering testing time reduction, our test methodology is based on BIST and ATPG. The main contributions of this paper are summarized as follows. (i). BIST is efficiently combined with external testing to relax the limitation of the external primary inputs and outputs. (ii). External testing for one of cores and BISTs for the others are performed in parallel to reduce the total testing time. (iii). The testing time minimization problem for core-based system LSIs is formulated as a combinatorial optimization problem to select the optimal set of test vectors from given sets of test vectors for each core
Keywords :
automatic test pattern generation; built-in self test; computational complexity; design for testability; embedded systems; integrated circuit testing; logic testing; minimisation; ATPG; BIST; combinatorial optimization problem; core-based system LSI; external testing; glue logic; implicit dead time; optimal set of test vectors; test methodology; testing time minimization problem; time complexity; Automatic test pattern generation; Built-in self-test; Computer science; Information science; Information technology; Large scale integration; Logic testing; Minimization methods; Protection; System testing;
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5093-6
DOI :
10.1109/TEST.1998.743187