DocumentCode
2525414
Title
Maximization of power dissipation under random excitation for burn-in testing
Author
Huang, Kuo Chan ; Lee, Chung Len ; Chen, Jwu E.
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
1998
fDate
18-23 Oct 1998
Firstpage
567
Lastpage
576
Abstract
This work proposes an approach to generate weighted random patterns which can maximally excite a circuit during its burn-in testing. The approach is based on a probability model and a maximization procedure to obtain signal transition probability distribution for primary inputs and to generate weighted random patterns according to the obtained probability distribution. It can especially generate weighted random patterns to excite particularly selected “weak nodes” of the circuit in order to expose the early failure of these nodes. Experimental results show that this approach can increase the power dissipation of the total circuit nodes up to 26.68% and the switching activity of particularly selected nodes up to 41.51% respectively
Keywords
CMOS digital integrated circuits; automatic testing; integrated circuit reliability; integrated circuit testing; logic testing; optimisation; probability; production testing; random processes; burn-in testing; maximization; power dissipation; primary inputs; probability distribution; probability model; random excitation; selected nodes; signal transition probability distribution; switching activity; weak nodes; weighted random patterns; Automatic test pattern generation; CMOS logic circuits; Circuit testing; Electronic equipment testing; Manufacturing; Power dissipation; Power generation; Switching circuits; Test pattern generators; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1998. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-5093-6
Type
conf
DOI
10.1109/TEST.1998.743200
Filename
743200
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