DocumentCode
2525478
Title
Phase noise behaviour of fractional-N synthesizers with ΔΣ dithering for multi-radio mobile terminals
Author
Valenta, Vaclav ; Baudoin, Genevieve ; Villegas, Martine
Author_Institution
ESIEE, Univ. Paris-Est, Noisy-le-Grand
fYear
2008
fDate
June 22 2008-April 25 2008
Firstpage
157
Lastpage
160
Abstract
This paper presents phase noise behaviour and design aspects of PLL based frequency synthesizers with DeltaSigma dithering for cognitive multi-radio mobile terminals. Principal features of PLL based frequency synthesizers and 1-bit DeltaSigma dithering are presented and simulated. Moreover, frequency synthesizer requirements for main standards in the frequency band 800 MHz to 6 GHz are investigated as well.
Keywords
frequency synthesizers; phase locked loops; phase noise; DeltaSigma dithering; PLL based frequency synthesizers; cognitive multiradio mobile terminals; fractional-N synthesizers; phase noise; 3G mobile communication; Bluetooth; Communication standards; Communication switching; Frequency synthesizers; GSM; Image converters; Phase locked loops; Phase noise; Transceivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Research in Microelectronics and Electronics, 2008. PRIME 2008. Ph.D.
Conference_Location
Istanbul
Print_ISBN
978-1-4244-1983-8
Electronic_ISBN
978-1-4244-1984-5
Type
conf
DOI
10.1109/RME.2008.4595749
Filename
4595749
Link To Document