• DocumentCode
    2525599
  • Title

    Implementation of Micro controller and reconfigurable logic Co-Design for low latency control

  • Author

    Misra, Priyashraba ; Patwardhan, Amit ; Patil, Bhushan

  • Author_Institution
    Sch. of Interdiscipl. Sci. & Technol., Int. Inst. of Inf. Technol., Pune, India
  • fYear
    2010
  • fDate
    10-12 Sept. 2010
  • Firstpage
    651
  • Lastpage
    653
  • Abstract
    Complex Programmable Logic Device (CPLD), the simplest hardware for implementing reconfigurable logic, and Micro controller have their specific advantages when implemented in their own domains. Most of the modern electronics circuits are implemented either only on CPLD or on Micro controller. If studied carefully, there are ways to implement both CPLD and controller on a single control circuit and use the advantages of both to the maximum. The field of Co-Design is about 10 years old. The paper elaborates the implementation of such a design.
  • Keywords
    hardware-software codesign; logic design; microcontrollers; programmable logic devices; reconfigurable architectures; shift registers; complex programmable logic device; electronics circuit; low latency control; microcontroller; reconfigurable logic co-design; shift register; Field programmable gate arrays; IEEE Lasers and Electro-Optics Society; Pins; Registers; Switches; Synchronization; CPLD[4]; Micro controller[5]; Shift Register;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Mechanical and Electrical Technology (ICMET), 2010 2nd International Conference on
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-8100-2
  • Electronic_ISBN
    978-1-4244-8102-6
  • Type

    conf

  • DOI
    10.1109/ICMET.2010.5598442
  • Filename
    5598442