Temperature and process compensated clock generator using feedback TPC bias

This paper proposes a temperature and process compensated clock generator using a feedback TPC (temperature and process compensation) bias circuit. With the proposed feedback TPC bias based on the OPA, MOS transistors and resistors, the BJT required in traditional bandgap bias circuit could be avoided. Thus, it is easy to be integrated with less area penalty. The proposed design is implemented using 0.25μm BCD process. According to the all-corners simulation results, the proposed clock generator processes the frequency diffusion error of 2.10% in the worst cases. Besides, the worst case duty cycle is simulated to be 48.93.%. The area of the chip is 0.1356 mm².