DocumentCode
252566
Title
A tunnel-FET SRAM array for energy-efficient embedded memory blocks in reconfigurable computing platforms
Author
Amir, M.F. ; Trivedi, A.R. ; Mukhopadhyay, S.
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2014
fDate
6-9 Oct. 2014
Firstpage
1
Lastpage
2
Abstract
This paper studies the potential of Si-Ge TFET for low-power embedded memory blocks in reconfigurable platforms. The key observations from the comparative analysis of FinFET and TFET based EMB are summarized in Fig. 14. At low frequency, switching to the TFET cell from FinFET provides lower read power but degrades read stability, which can be improved through circuit techniques (TFETB). However, as the frequency increases, the TFET advantages begin to decrease, and eventually for high frequency target TFET may become more power hungry than FinFET. The analysis shows the potential of using TFET for designing memory for low-power reconfigurable platform with relaxed performance targets.
Keywords
Ge-Si alloys; SRAM chips; field effect transistors; low-power electronics; EMB; FinFET; SiGe; TFETB; circuit technique; energy-efficient embedded memory block; low-power embedded memory block; read power; read stability; reconfigurable computing platform; static random access memory; tunnel field effect transistor; tunnel-FET SRAM array; Arrays; Energy efficiency; FinFETs; Microprocessors; Random access memory; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
Conference_Location
Millbrae, CA
Type
conf
DOI
10.1109/S3S.2014.7028224
Filename
7028224
Link To Document